We aim to develop a real-time edge detection system on a chip for a digital camera. We design a model of canny edge detector application and represent it in the SpecC system-level description language (SLDL) so that the design model can be used for implementation as a System-on-Chip (SoC) suitable for use in a digital camera. Then, we use System-on-Chip Design Environment (SCE), a refinement-based framework, to analyze our system. Besides, we assign a processor, hardware units and buses to meet realtime requirements.